ORNL scientists studied ways to enhance the proposed memory cell performance and minimize access times and energies, yielding a novel cryogenic, or low-temperature, design that may resolve a memory storage bottleneck, accelerating a pathway to next-generation computing.
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January 4, 2017 – Scientists at Oak Ridge National Laboratory have proposed a novel cryogenic, or low-temperature, memory cell circuit design that may resolve a memory storage bottleneck, accelerating the pathway to exascale and quantum computing. The proposed design converges write, read and reset memory operations on the same circuit, enabling memory processing functions to operate faster and more efficiently. This could yield decreased access energies and access times and allow for more circuits to occupy less space. Details of the research were published in Superconductor Science and Technology and Physical Review E.
