Publication Type
Conference Paper
Publication Date
Publisher Location
United States of America
Conference Name
IEEE International Symposium on Circuits and Systems
Conference Location
Baltimore, Maryland, United States of America
Conference Date
-
Abstract
Charge sensitive pre-amplifier architectures have been studied for decades for various applications, most of which adopt a gain stage with capacitor feedback to integrate the signal and a reset path to provide DC bias. For the biological temperature readout front-end, we propose a novel structure without the gain stage, which implies a strong potential for fully integrated high frequency applications. The proposed design provides 0.94 mV/pC with high conversion linearity while consuming only 1.4 micro watts of power with buffer under a 1.2-V supply rail. The prototype occupying a chip area of 0.038 square millimeter is fabricated in 130 nm standard CMOS process.
