Project Details
Goal. The overarching goal of this Abisko project is to develop an energy-efficient spiking neural network (SNN) computing architecture and software system capable of autonomous learning and operation. The SNN architecture will use novel neuromorphic devices that are based on resistive switching materials. Equally important, Abisko will use a deep codesign approach to pursue this goal, engaging experts from across the entire range of disciplines: materials, devices and circuits, architectures and integration, software, and algorithms. Abisko will reconceptualize the process of codesign by using systematic techniques to better integrate and globally optimize the technologies across the many levels of abstraction necessary in contemporary computing systems.
Research objectives. The key objectives of our Abisko project are threefold. First, we will design an energy-optimized high-performance neuromorphic accelerator based on SNNs capable of autonomous learning and operation. This architecture will be designed as a chiplet that can be deployed in contemporary computer architectures. Second, we will concurrently develop a productive software stack for the neuromorphic accelerator with the additional goal that it be portable to other architectures, such as field-programmable gate arrays and GPUs. Third, we will create a new deep codesign framework for developing clear interfaces, requirements, and metrics between each level of abstraction in which the system design can be explored and implemented interchangeably with execution, measurement, a model, or a simulation.
Approach. Our approach will be to assemble experts in codesign and from each level of computing abstraction to study codesign methodology and tools in the context of designing a specific hardware and software system for a chiplet that provides the computational capability of an SNN. Our team will be organized into six research thrusts: algorithms, software, architectures and integration, devices and circuits, materials, and codesign. The algorithms thrust will identify computational motifs for SNN algorithms and tailor those motifs for our software and hardware interfaces for SNN implementation. The software thrust will extend the LLVM compiler ecosystem to create a compiler intermediate representation for SNN execution and an asynchronous instruction set architecture for general neuromorphic computing. The architecture and integration thrust will design a conceptual SNN chiplet, including the models and tools needed to integrate it into contemporary packaging technologies. The devices and circuits thrust will model and simulate a range of neuromorphic devices and interconnects by using technology computer-aided design simulation and Verilog-A models with the goal of providing a standard library of modules to the higher levels. The materials thrust will investigate new resistive switching materials for energy-efficient neuromorphic devices that offer scalability, CMOS compatibility, and good radiation characteristics while simultaneously investigating more aggressive molecular-based materials and ferroelectric semiconductors. It will also identify new pathways to abstract material performance to the device level by using numerical compact modeling coupled with machine learning. The codesign thrust will drive the overall design by extend existing modeling tools (e.g., ASPEN/FLAME) to capture specific interfaces for each layer and their interactions globally across the entire computing stack. This representation will facilitate automatic design space exploration.
