Publication Type
Conference Paper
Book Title
IEEE International Symposium on Circuits and Systems (ISCAS)
Publication Date
Page Numbers
1 to 5
Publisher Location
New Jersey, United States of America
Conference Name
2023 IEEE International Symposium on Circuits and Systems (ISCAS)
Conference Location
Monterey, California, United States of America
Conference Sponsor
IEEE
Conference Date
-
Abstract
Low latency inference has many applications in edge machine learning. In this paper, we present a run-time configurable convolutional neural network (CNN) inference ASIC design for low-latency edge machine learning. By implementing a 5-stage pipelined CNN inference model in a 3D ASIC technology, we demonstrate that the model distributed on two dies utilizing face-to-face (F2F) 3D integration achieves superior performance. Our experimental results show that the design based on 3D integration achieves 43% better energy-delay product when compared to the traditional 2D technology.
