Abstract
Commodity accelerator technologies including reconfigurable devices and graphical processing units (GPUs) provide an order of magnitude performance improvement compared to mainstream microprocessor systems. A number of compute-intensive, scientific applications, therefore, can potentially benefit from commodity computing devices available in the form of co-processor accelerators. However, there has been little progress in accelerating production-level scientific applications using these technologies due to several programming and performance challenges. One of the key performance challenges is performance sustainability. While computation is often accelerated substantially by accelerator devices, the achievable performance is significantly lower once the data transfer costs and overheads are incorporated. We present an application-specific memory characterization technique for an FPGA-accelerated system that enabled us to reduce data transfer overhead for a scientific application by a factor of 5. We classify large data structures in the application according to their read and write characteristics and access patterns. This classification in turn enabled us to sustain a speedup of over three for a full-scale scientific application. Our proposed technique extends to applications that exhibit similar memory behavior and to co-processor accelerator systems that support data streaming and pipelining, and allow overlapped execution between the host and the accelerator device.
