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Development of a low-inductance SiC trench MOSFET power module for high-frequency application...

by Zhiqiang Wang, Fei Yang, Steven L Campbell, Madhu Sudhan Chinthavali
Publication Type
Conference Paper
Book Title
2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
Publication Date
Page Numbers
2834 to 2841
Publisher Location
New Jersey, United States of America
Conference Name
2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
Conference Location
San Antonio, Texas, United States of America
Conference Sponsor
IEEE Industry Applications Society; IEEE Power Electronics Society
Conference Date
-

This paper deals with the development of a low-inductance multiple-chip power module with state-of-art 1200 V SiC Trench MOSFETs for high-frequency application. Specifically, a phase-leg power module package with integrated decoupling capacitance is fabricated based on P-cell/N-cell concept, and the packaging design is discussed in detail. Dedicated double pulse test is built, and a gate driver with cross-talk suppression function is designed to support the fast switching speed operation of SiC Trench MOSFETs. The parasitic inductance and current density distribution of the power module are simulated and extracted for the purpose of voltage spike limiting. The temperature dependent static and switching characteristics of the developed module are evaluated as well, and the key differences from traditional SiC double-diffused MOS (DMOS) are identified and discussed. Based on the turn-off switching characterization results, a lumped equivalent power-loop parasitic inductance of ~6 nH is achieved for the designed power module.