Abstract
This paper focuses on a novel method for successive approximation register analog to digital converter control in synchronized phasor measurement units (PMUs). To compensate for the sampling time error caused by the division remainder between the desirable sampling rate and the oscillator frequency, a variable sampling interval control method is presented by interlacing two integers under a proposed criterion. The frequency of the onboard oscillator is monitored in real-time using the pulse per second (PPS) timing reference from global positioning system. The sampling control is adaptively adjusted each second according to the latest estimated oscillator frequency. The “saw tooth” in phasor angle error and DC offset and spikes in frequency error can be effectively eliminated by applying the proposed method. The simulation and experiment results validate the effectiveness and accuracy of the proposed method, which is believed to be able to greatly improve the performance of PPS-disciplined synchronous sampling methods in PMUs.
