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A Simple Control to Reduce Device Over-Voltage Caused by Non-Active Switch Loop in Three-Level ANPC Converters...

Publication Type
Conference Paper
Book Title
Proceedings of the IEEE Applied Power Electronics Conference and Exposition
Publication Date
Page Numbers
1337 to 1343
Publisher Location
New York, United States of America
Conference Name
IEEE Applied Power Electronics Conference and Exposition
Conference Location
Anaheim, California, United States of America
Conference Sponsor
IEEE
Conference Date
-

With the development of wide band-gap (WBG) technology, the switching speed of power semiconductor devices increases, which makes circuits more sensitive to parasitics. For three-level active neutral point clamped (3L-ANPC) converters, the over-voltage caused by additional non-active switch loop can be an issue. This paper analyzes the multiple commutation loops in 3L-ANPC converter and summarizes the impact factors of the device over-voltage. The nonlinearity of the output capacitance of the device can significantly influence the over-voltage. A simple control without introducing additional hardware circuit or complex software algorithm is proposed to attenuate the effect of the nonlinear output capacitance. Multi-pulse test is conducted for a 3L-ANPC converter built with silicon carbide (SiC) MOSFETs. With the proposed control, the testing results show that the peak drain-source voltage of both active and non-active switches is reduced by more than 20% compared to the conventional control.