Abstract
Middle-point inductance L_middle can be introduced in power module designs with P-cell/N-cell concept. In this paper, the effect of middle-point inductance on switching transients is analyzed first using frequency domain analysis. Then a dedicated multiple-chips power module is fabricated with the capability of varying L_middle, and extensive switching tests are conducted to evaluate the device’s switching performance at different L_middle. Experiment results show that as L_middle changes, different voltage stresses are imposed on the active switch and anti-parallel diode. For lower MOSFET’s turn-off, as L_middle goes up, the maximum voltage of lower MOSFET increases; however, the maximum voltage of anti-parallel diode decreases significantly. In addition to voltage spikes, it is observed that the active MOSFET’s turn-on loss will decrease at higher values of L_middle while its turn-off loss will increase. Detailed analysis of this loss variation is presented. The analysis and experiment results will provide design guidelines for multiple-chips power module package design with P-cell/N-cell concept.
