Abstract
The AT-HVCM, achieved by series-stacking the dual-function resonant filter capacitors following each rectification stage, is the baseline design for the PPU project at the SNS [1]. The project requires three AT-HVCM modulators to power 28 additional 700kW klystrons and associated high beta cavities to accelerate 38mA of beam current to 1.3GeV. Each modulator produces an 82 kV, 120A output pulse of 1.35ms duration at a 60Hz repetition rate. The AT design approach improves upon the existing HVCM topology, reducing stresses on the H bridge IGBTs using zero voltage (ZVS) and current switching (ZCS) techniques and on the resonant filter capacitors by limiting voltage reversal. This paper reviews the prototype development progress, currently focused on evaluating system reliability, and discusses some design techniques to achieve the modulator performance requirements.
