Publication Type
Conference Paper
Book Title
Proceedings of the 2022 IEEE International Conference on Emerging Electronics (ICEE)
Publication Date
Page Numbers
1 to 4
Publisher Location
New Jersey, United States of America
Conference Name
International Conference on Emerging Electronics (ICEE)
Conference Location
Bangalore, India
Conference Sponsor
IEEE
Conference Date
-
Abstract
In this paper, we present a scalable digital hardware accelerator based on non-volatile memory arrays capable of realizing deep convolutional spiking neural networks (SNNs). Our design studies are conducted using a compact model for spin-transfer torque random access memory (STT-RAM) devices. Large networks are realized by tiling multiple cores which communicate by transmitting spike packets via an on-chip routing network. Compared to an equivalent SRAM based core design, we show that the STT-RAM based design achieves nearly 15X higher GSOPS (Synaptic Operations per Second) per Watt per mm 2 making it a promising platform for realizing systems with significant area and power limitations.
